ISLAMABAD: American chip design software giant Synopsys has abruptly suspended both its annual and quarterly financial forecasts following new U.S. government export restrictions targeting China.
The move comes just one day after the company had confidently issued its guidance for the fiscal year.
US Export Rules Shake Semiconductor Sector
The company disclosed on Thursday that it had received a formal communication from the Bureau of Industry and Security (BIS), a division of the U.S. Department of Commerce, which notified Synopsys of new regulations limiting its ability to sell Electronic Design Automation (EDA) software to Chinese customers.
Synopsys, which plays a critical role in the global semiconductor design ecosystem, said it is now evaluating the full implications of the BIS directive. “Synopsys is currently assessing the potential impact of the BIS letter on its business, operating results and financial condition,” it stated.
Following the news, Synopsys shares fell 2.5% in Thursday’s afternoon trading session, reflecting investor concern over the revenue implications from its major market, China.
Growing Pressure on EDA Software Exports
The latest U.S. restrictions appear to be part of a broader strategy to control exports of high-tech software used in semiconductor design and production. These tools are essential for designing cutting-edge chips, including those used in artificial intelligence, defense, and advanced communications systems.
According to Reuters, the U.S. has revoked export licenses from some companies and informed others that new licenses will now be mandatory for shipments to Chinese clients.
Synopsys is not alone in this scenario—rival companies such as Siemens and Cadence are also caught in the regulatory crosshairs. Siemens stated it will work with customers to mitigate any disruptions, while Cadence has not yet provided a public response.
Industry experts believe the new restrictions may further strain U.S.-China tech relations and could push Chinese firms to accelerate efforts in domestic chip design alternatives.
